Electro-Mechanical-Thermal Co-Design and Side Effect Mitigation for a 75 kVA SiC-Based Intelligent Grid-Interface Bidirectional Converter
Abdul Basit Mirza
Stony Brook University, 2024
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Abstract: Grid-integration of renewables and energy storage through power electronic grid-interface converters is essential for achieving a more sustainable smart grid. This mission involves developing compact and efficient converters with standardized hardware interface and communication architecture to address redundancy and compatibility concerns. At converter level, advent of Wide Band Gap (WBG) devices such as Silicon Carbide (SiC) have allowed high power density and efficiency targets, owing to their fast switching capability. However, fast switching capability of SiC requires tight integration of power devices, constraining the electrical and mechanical design. Besides this, at system level, increased penetration of power electronic converters raise concerns on system interoperability and reliability. These concerns stem from the variation in communication protocols and interconnections, which are influenced by both the manufacturer and the geographic region. This diversity presents challenges to the smooth scalability of systems and, at the same time, leads to higher expenses related to installation and maintenance. Furthermore, the degradation of essential converter components, such as passive elements and power devices, caused by switching action due to Pulse Width Modulation (PWM) profoundly affects the converter's operational lifespan and reliability.
In line to address the above-mentioned challenges, this work proposes a two-stage SiC-based 75 kVA Intelligent Grid-Interface Bidirectional Converter (IGIBC), comprising DC-DC and DC-AC power stages with standardized interconnects. From the converter design perspective, the proposed IGIBC is built using discrete SiC devices in the TO-247 package. The power stage is electro-mechanically-thermally co-designed and packaged on a modular 3D structure platform, where all three sides of the customized heat sink are utilized to achieve high power density (5.5 kW/L), including passive components. For optimum switching performance, an optimized PCB layout is developed with minimum board parasitic capacitance. Similarly, the split-direct winding technique is employed for magnetics to achieve minimum winding capacitance and associated current ringing. Further, for the DC-AC stage, Two-Level Split-Phase (2L-SP) topology is employed, owing to its lower switching loss, ruggedness against short-circuit and increased cross-talk immunity compared with simple Two-Level (2L) topology. An equivalent switching transition circuit is derived to optimize the value of the split inductor for the DC-AC stage. Lastly, the developed power stage is packaged inside a NEMA box enclosure and is systematically tested at rated system voltage with an RL load.
Further, from the intelligence perspective, the proposed IGIBC features online non-invasive health monitoring of converter components through a pseudo-optimized Digital Twin (DT)-based approach. DT also aids in identifying system failure modes, providing an extra layer of protection. Additionally, for synchronized grid-tie operation with several IGIBC units, a hierarchical central controller is proposed and developed, which controls the DC-AC stage and monitors the health of each IGIBC through dedicated control and data serial communication channels.
Moreover, the work also explores into design of integrated magnetic structures for interleaved boost converter and side effect mitigation in 2L SiC-based power electronic converters. Interleaving in a boost converter is beneficial for lowering input and output current ripples through ripple cancellation due to phase-shift between channel currents. However, interleaving does not affect the channel current ripple. The channel current comprises circulating Differential Mode (DM) current and Common Mode (CM) boost current, whose ripples constitute the total channel current ripple. Inverse coupling between channel inductors effectively lowers channel current ripple while maintaining the same input and output current ripples. However, with a single inverse coupled inductor, its leakage inductance, which serves as a boost inductor, depends on the winding arrangement and is challenging to balance in both channels. To overcome this, an Integrated Magnetic Structure (IMS), based on a gapped EE-core, is proposed that combines both CM and DM inductances in a single core. The CM and DM inductances are independent and depend on separate winding turns. In addition, the fast switching (dv/dt and di/dt) capability of SiC devices exacerbates the underlying side effects, such as Electromagnetic Interference (EMI) emissions, Reflected Wave Phenomenon (RWP), and Partial Discharge (PD). These side effects are more pronounced and are a concern in motors fed with cable-connected 2L SiC-based drives, leading to the premature failure of the motor and degradation of the converter. Side-effect mitigation approaches involve adding filters or employing a converter topology with a lower output slew-rate (dv/dt).
In this context, the dissertation explores the lower output voltage dv/dt benefit of the 2L-SP topology in suppressing the side effects. Firstly, the DC-side conducted CM EMI emissions of the 2L-SP are investigated and compared with the 2L topology. CM noise propagation path modeling of 2L-SP is performed in the frequency domain, followed by validation on an 18 kVA SiC-based hardware prototype. The results show that increasing split inductance significantly lowers the CM magnitude with a maximum reduction of 17.85 dB. The reduction is attributed to the lower dv/dt of the CMV sources.
Further, CM EMI study is followed by an investigation of RWP in the 2L-SP inverter-fed motor drive and its comparison with the traditional 2L topology with output reactor. Analytical models are derived with closed-form expressions for slew-rate and RWP transients. Subsequently, Double Pulse Tests (DPT) are performed for different cable lengths for both 2L-SP and 2L drive configurations to validate the models. According to the experimental results, split inductors in the 2L-SP lower the output dv/dt and act as auxiliary/output reactor, resulting in a maximum reduction of 60 % and 74 % in load-side overvoltage and drive-side overcurrent for the 8 m cable. Moreover, split inductors decouple load, anti-parallel diode, and complementary device parasitics from the switching device, achieving a 17 % lower switching loss than 2L-LF.
Finally, the dissertation delves into the investigation of the impact of PCB parasitic capacitance of the turn-OFF transient in discrete TO-247 packaged-based chopper and half-bridge configurations using the 2L-SP phase leg. These configurations are a fundamental building block for various power electronics converter topologies, including two-level and multi-level AC-DC or DC-AC converters and DC-DC converters such as buck, boost, buck-boost, resonant converters, and Dual Active Bridge (DAB). However, fast switching of SiC implies high dv/dt and di/dt, imposing a constraint on the PCB power loop inductance in minimizing voltage overshoot during the turn-OFF transient. Although the widely adopted vertical power loop design effectively reduces the loop inductance, it increases the PCB parasitic capacitance. Due to the considerable lead inductance of the TO-247 package, this PCB capacitance is paralleled to the device's output capacitance through the package lead inductance, altering the switching transient. At first, small-signal models incorporating PCB capacitance are derived. Subsequently, these models are validated in the frequency domain, and the switching transients are compared through DPT on two PCB prototypes with the same layout but different stack-ups, yielding different PCB capacitances. Finally, the proposed small-signal models are analyzed to establish criteria, in terms of TO-247 lead and PCB loop inductance, for minimizing the impact of PCB capacitance on switching transients.
Recommended citation (BibTex):
@phdthesis{Mirza2024,
author = {Mirza, Abdul Basit},
school = {Stony Brook University},
title = {Electro-Mechanical-Thermal Co-Design and Side Effect Mitigation for a 75 kVA SiC-Based Intelligent Grid-Interface Bidirectional Converter},
year = {2024}
}